In recent years increasing attention has been given to apparatus for detecting, correcting and logging errors occurring during digital data processing operations. In providing such capabilities, it is important to provide appropriate balances between the advantages to be gained therefrom and the cost, complexity and performance impact resulting from the additional hardware, firmware, and/or software required. Accordingly, it becomes of considerable importance to choose an implementation for detecting, correcting and logging errors which permits appropriate advantage to be derived therefrom without unduly impacting on system cost, complexity or performance.